ABSTRACT
Advanced Encryption Standard is the most widely used Symmetric cipher today. The algorithm uses a combination of Exclusive-OR operations (XOR), octet substitution with an S-box, row and column rotations, and a Mix Column. An adjusted engineering for AES with upgraded key development and for the Mix Column/Inverse Mix Column operations are fixed to reduce the chip region. Both encryption and decryption processes were implemented in the single chip. The throughput of 38.65 Gbps for encryption/decryption in a single chip (Virtex-5) FPGA has been accomplished.
