ABSTRACT
SNTs (surrounding-gate nanowire transistors) are good candidates to implement low power electronic devices. They provide full gate control over the channel and minimize short channel effects. Design of a high-speed opamp is presented in this paper. It consists of two amplifying stages and an output buffer and is frequency compensated for stable operation. Transistors used have 10nm channel length and 2nm channel radius. The amplifier operates from 1.8V supply and has a voltage gain of 40dB and a phase margin of 42°. The current gain cutoff frequency of the amplifier is 5.1THz and it provides 40dB common mode rejection ratio and 54dB power supply rejection ratio with a slew-rate of 2V/ns. The amplifier area is 320nm by 250nm.
